Package having very thin semiconductor chip, multichip...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S685000, C257S686000, C257S723000, C257S698000

Reexamination Certificate

active

06239496

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a very thin semiconductor package mounting a very thin semiconductor chip, multichip module (MCM) in which plural pieces of the very thin semiconductor packages are laminated, and manufacturing method for the same very thin semiconductor package and MCM.
2.Description of the Related Art
FIG. 1
is a cross sectional view of a conventional MCM in which the semiconductor packages are laminated. This MCM has a structure in which two semiconductor packages are laminated by tape carrier package (TCP) architecture in a space having a restricted height. In the lower TCP, Cu wiring layers
104
a
,
104
j
are disposed on a polyimide film
101
, which is an insulating substrate. End portions of the Cu wiring layers
104
a
,
104
j
are connected to inner leads
203
a
,
203
j
. The inner leads
203
a
,
203
j
are connected to bonding pads of a silicon chip
94
. Further, the silicon chip
104
is bonded to the insulating substrate
101
with insulating adhesive (not shown). A top portion of the silicon chip
94
and the inner leads
203
a
,
203
j
are sealed with sealing resin layer
95
made of epoxy or the like. Cu wiring layers
105
a
,
105
j
are disposed on a surface of the polyimide film
102
on the upper TCP. End portions of the Cu wiring layers
105
a
,
105
j
are connected to inner leads
204
a
,
204
j
, and the inner leads
204
a
,
204
j
are bonded to bonding pads disposed on the silicon chip
96
. Further, the silicon chip
96
is attached to the insulating substrate
102
with insulating adhesive (not shown). A top portion of the silicon chip
96
and the inner leads
204
a
,
204
j
are sealed by sealing resin layer
97
. In such a conventional semiconductor package having upper/lower levels structure, the thickness of the silicon chips
94
,
96
is about 200 &mgr;m. Thus, the thickness of each package is 350 &mgr;m to 500 &mgr;m. Therefore, the bending strength of the package is relatively high so that there is little possibility that the package may crack when bent.
There are increasing demands recently for reductions in thickness, geometrical size, weight and the like in the field of IC cards, portable information instruments or mobile multimedia applications and the like. However, because the height of the package from its mounting face of the MCM substrate is quite high, the MCM shown in
FIG. 1
is not capable of satisfying the recent demands such as the reduction in thickness.
SUMMARY OF THE INVENTION
Accordingly, the present invention has been conceived to solve the above described problems and, therefore, it is an object of the invention is to provide a very thin semiconductor package suitable for a stacked structure, and strong against stress in a bending direction.
Another object of the invention is to provide an MCM, which is very thin in total thickness, and has a high breaking strength when the semiconductor packages are laminated.
More specifically, it is still another object to provide a very thin MCM in which an occurrence of crack in the package due to stress in the bending direction is prevented effectively.
A still another object of the present invention is to provide a manufacturing method for a very thin MCM, having a high breaking strength.
To achieve the above object, a first feature of the present invention inheres in a semiconductor package having: insulating substrates; wiring layers disposed on the surface of the insulating substrate; a semiconductor chip disposed in a device hole provided in the insulating substrate; inner-joint-conductors for connecting at least part of the bonding pads on the surface of the semiconductor chip to the corresponding wiring layers; and connection lands connected to the wiring layers. The device hole is provided so as to penetrate the central portion of the insulating substrate. The thickness of the semiconductor chip is smaller than that of the insulating substrate. Then, the semiconductor chip is disposed in the device hole such that a bottom thereof is flush with a bottom plane of the insulating substrate.
According to the first feature of the present invention, the thickness of the semiconductor chip is reduced smaller than the normally used thickness. As the semiconductor chip, an element semiconductor such as silicon (Si), germanium (Ge), etc. or a compound semiconductor chip such as gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), silicon carbide (SiC), etc. may be employed. And according to the semiconductor package of the first feature, a very thin semiconductor package is achieved.
A second feature of the present invention lies in laminated structure assembled by plural pieces of the semiconductor packages, each of the semiconductor packages is already stated in the first feature of the present invention. That is, according to the second feature of the present invention, first and second semiconductor packages, each having the above-described first feature of the present invention, are laminated, for example. The first semiconductor package has: a first insulating substrate; first wiring layers disposed on the first insulating substrate; a first semiconductor chip disposed in a first device hole of the first insulating substrate; first inner-joint-conductors for connecting the first bonding pads to the first internal wiring layers; first connection lands connected to the first wiring layers. On the other hand, the second semiconductor package has a second insulating substrate disposed above the first insulating substrate; second wiring layers disposed on the second insulating substrate; a second semiconductor chip disposed in the second device hole of the second insulating substrate; second inner-joint-conductors for connecting the second semiconductor chip to the second wiring layers; and second connection lands electrically connected to the first connection lands.
Here, the first device hole is formed so as to penetrate the central portion of the first insulating substrate. Likewise, the second device hole is formed so as to penetrate the central portion of the second insulating substrate. The thickness of the first and second semiconductor chip is smaller than that of the first and second insulating substrates. The first semiconductor chip is disposed in the first device hole such that a bottom thereof is flush with a bottom plane of the first insulating substrate. The second semiconductor chip is disposed in the second device hole such that a bottom thereof is flush with a bottom plane of the second insulating substrate. The first inner-joint-conductors connect at least part of the first bonding pads on the first semiconductor chip to the corresponding first wiring layers. The second inner-joint-conductors connect at least part of the second bonding pads on the second semiconductor chip to the corresponding first wiring layers.
According to the MCM of the second feature of the invention, plural pieces of the thin semiconductor packages are laminated on the MCM substrate. And the upper and lower semiconductor packages in a vertical direction are connected through their predetermined connection lands. Therefore, the thin semiconductor packages can be stacked in multi-levels in a preferable fashion, thereby the stacked performance being remarkably improved. If the present invention is applied to, for example, a media card of a digital camera, the media card having a large memory capacity despite a small size can be achieved. Further, because the semiconductor packages are laminated with the top and bottom surfaces of the thin silicon chips inverted and the predetermined connection lands are electrically connected, they can be stacked such that weak portions of the thin semiconductor packages are not aligned on the same projection plane. As a result, the breaking strength of the MCM when the semiconductor packages are laminated is increased and the portion of the package weak to stress in the bending direction can be reinforced, so that an occurrence of crack in the package can be prev

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Package having very thin semiconductor chip, multichip... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Package having very thin semiconductor chip, multichip..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Package having very thin semiconductor chip, multichip... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2549581

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.