Package for mating with a semiconductor die

Details Package for mating with a semiconductor die Package for mating with a semiconductor die

1995-06-07

1996-12-24

Whitehead, Jr., Carl

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

257 81, 257692, 257787, H01L 23495, H01L 2715, H01L 3112

Patent

active

055876056

ABSTRACT:
An interconnect package (35) for interconnecting electrical system components. A first leadframe (10) having leads (11) is encapsulated within a molding compound forming a first section (36) of the interconnect package (35). The first section (36) optionally includes channels (54). A second leadframe (20) having leads (22, 23) is encapsulated within a molding compound forming a second section (37) of the interconnect package (35). The first and second sections (36 and 37, respectively) are coupled together with an adhesive material (43). An end (44) is removed from the interconnect package (35) forming an edge (50). A semiconductor chip (51) is coupled to the edge (50).

REFERENCES:
patent: 4982268 (1991-01-01), Schuermann

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