Package designs for fully functional and partially...

Details Package designs for fully functional and partially... Package designs for fully functional and partially...

2007-03-15

2010-11-02

Rossoshek, Helen (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000, C714S010000, C714S025000, C714S036000, C714S741000, C714S742000

Reexamination Certificate

active

07827515

ABSTRACT:
A method including obtaining an operational status of a first processor core, where the first processor core is associated with a plurality of processor cores located on a chip; configuring a first IO block of a package design based on the operational status of the first processor core, where the package design is based on a fully functional chip; and configuring a stackup of the package design after configuring the first IO block for use with the chip.

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