P channel Rad Hard MOSFET with enhancement implant

Semiconductor device manufacturing: process – Making regenerative-type switching device – Having field effect structure

Reexamination Certificate

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C438S197000, C438S268000, C257SE21383, C257SE21418

Reexamination Certificate

active

07547585

ABSTRACT:
A P channel vertical conduction Rad Hard MOSFET has a plurality of closely spaced base strips which have respective sources to form invertible surface channels with the opposite sides of each of the stripes. A non-DMOS late gate oxide and overlying conductive polysilicon gate are formed after the source and base regions have been diffused. The base stripes are spaced by about 0.6 microns, and the polysilicon gate stripes are about 3.2 microns wide. A P type enhancement region is implanted through spaced narrow windows early in the process and are located in the JFET common conduction region which is later formed by and between the spaced base stripes. The device is a high voltage (greater than 25 volts) P channel device with very low gate capacitance and very low on resistance.

REFERENCES:
patent: 5338693 (1994-08-01), Kinzer
patent: 5475252 (1995-12-01), Merrill et al.
patent: 5831318 (1998-11-01), Spring et al.
patent: 6165821 (2000-12-01), Boden et al.
patent: 6541820 (2003-04-01), Bol
patent: 6747312 (2004-06-01), Boden
patent: 6798016 (2004-09-01), Boden
patent: 2004/0183127 (2004-09-01), Boden

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