Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2000-04-26
2002-10-08
Sherry, Michael (Department: 2829)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C257S347000
Reexamination Certificate
active
06461899
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device formed by a circuit made from a thin film transistor (hereafter referred to as TFT) formed on a substrate, and a method of manufacturing thereof. In particular, the present invention relates to an insulating film formed between a semiconductor layer which is an active layer of the TFT, and the substrate. This kind of insulting film is referred to as a blocking layer or a base film. Along with obtaining good TFT characteristics, the present invention relates to a suitable insulating film structure for preventing deterioration of the TFT, and the method of its manufacture.
The semiconductor device of the present invention includes a display device having a TFT or a semiconductor circuit including TFTs, and an electro-optical device such as an image sensor. In addition, the semiconductor device of the present invention also includes electronic equipment loaded with these display devices and electro-optical devices as the category.
2. Description of the Related Art
Active matrix display devices in which thin film transistors (hereafter referred to as TFTs) having an active layer formed by a crystalline semiconductor layer are used as pixel switching elements, and used to form driver circuits, have been in the spotlight in recent years as a means of realizing a high definition, high image quality image display. A crystalline silicon layer, for example, in which an amorphous silicon layer is crystallized by a method such as laser annealing or thermal annealing, is suitably used as a crystalline semiconductor layer material. A TFT using a crystalline silicon layer can realize a high electric field effect mobility and has good current drive capabilities, and therefore fine processing becomes possible, and it becomes possible to improve the aperture ratio of the pixel portion.
In order to realize a large surface area, low cost display in this type of active matrix display device, the use of a glass substrate, having a lower cost than a quartz substrate, becomes a premise. Due to its heat resistance temperature, it is therefore necessary to set the maximum production temperature from 600 to 700° C. or less. However, alkaline metals such as sodium (Na) are contained in the glass substrate in microscopic amounts. Consequently, it becomes necessary to form a blocking layer, made from a film such as a silicon oxide film or a silicon nitride film, on at least the surface of the substrate on which the TFTs are formed, so that the alkaline metal elements do not become mixed into the active layers of the TFTs.
Top gate type and bottom gate type (or inverse stagger type) structure is known structures for a TFT manufactured on a glass substrate. A top gate type structure is one in which at least a gate insulating film and a gate electrode are formed on the active layer on the side opposite that of the substrate. A blocking layer such as the one stated above is then formed on the face of the active layer opposite to the side contacting the gate insulating film (hereafter referred to as the back channel side in this specification for convenience).
TFT characteristics can be shown by typical parameters such as electric field effect mobility and threshold voltage (hereafter abbreviated to V
th
). As shown in
FIG. 23A
in the graph of (drain current)
½
vs. gate voltage (hereafter abbreviated as I
d
and V
g
, respectively), V
th
can be found by extrapolating the straight line region to the V
g
axis. Further, the relationship between the drain current and the gate voltage in the neighborhood or below, V
th
is referred to as the sub-threshold characteristic, and is an important property for determining the TFT performance as a switching element. A sub-threshold coefficient (hereafter shortened to S value) is used as a constant showing the merit of the sub-threshold characteristic. As shown in
FIG. 23B
, when the sub-threshold characteristics are plotted on a semi-log graph, the S value is defined as the gate voltage required in order to have a change of one order of magnitude in the drain current. The smaller the S value is, the faster it is possible to operate the TFT, and the lower its power consumption becomes. Furthermore, in a shift register circuit formed in a driver circuit, if the S value is large (if the sub-threshold characteristics are poor), then charge loss occurs due to the leak current, and this causes a fatal operation fault.
It is good, then, for the sake of circuit operation, to set V
th
at between 0.5 and 2.5 V for an n-channel TFT, and at between −2.5 and −0.5 V for a P-channel TFT, but if the active layer becomes one with n-type conductivity due to an unintentional cause, then V
th
may shift to the order of −4 to −3 V. If this happens, then the n-channel TFT becomes in the on state even when the gate voltage is not applied, and the designed switching characteristics cannot be obtained. The circuit becomes impossible to operate.
In order to control the value of V
th
, a method of doping an impurity element that imparts p-type conductivity into a channel forming region of the active layer, at a concentration about 1×10
16
and 5×10
17
atoms/cm
3
, is employed. This type of measure is referred to as a channel dope, and is important in the manufacture processes of the TFT.
When voltage is applied to the gate electrode in a top gate type TFT, alkaline metal element within the glass substrate which have been ionized are drawn to the active layer side by the polarity of the voltage. If the quality of the blocking layer is poor, the ions then easily mix into the active layer, change the electrical characteristics of the TFT, and the reliability cannot be maintained over time.
If a silicon nitride film is used as the blocking layer, then the blocking effect of impurity ions is high, but there are many trap levels, and further, the internal stress is large. Therefore, there is a fear of problems developing with the TFT characteristics if a silicon nitride film is formed directly contacting the active layer. On the other hand, a silicon oxide film has a wider band gap than a silicon nitride film, has superior insulating characteristics, and has the advantage of few trap levels. However, a silicon oxide film has disadvantages of moisture absorbency, and a low blocking effect against impurity ions.
If this type of blocking layer is formed, and an amorphous semiconductor layer is formed thereon, and then formed into a crystalline semiconductor layer by laser annealing or thermal annealing, then the internal stress of the blocking layer changes. This imparts a warping of the crystalline semiconductor film, and even if the TFT is completed in this state, the electrical characteristics such as V
th
and the S value will deviate from their intended values. As a result, it becomes impossible to operate the TFT at the desired voltage.
A channel dope is a method which is effective in controlling V
th
, but if V
th
shifts to the order of −4 to −3 V when a circuit such as a CMOS circuit is formed by forming both an n-channel TFT and a P-channel TFT on the same substrate, then it is difficult to control the V
th
of both TFTs with one channel dope. In other words, in order to make the V
th
of the n-channel TFT between 0.5 and 2.5 V, and the V
th
of the P-channel TFT from −2.5 to −0.5 V, the amount of impurity element which must be added is not the same. If channel doping is performed twice, the number of process steps increases, and this is a cause of increases manufacturing costs.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a TFT that can be manufactured without dispersion of TFT characteristics, typically V
th
and the S value, and with stable characteristics, and to provide a method of manufacturing thereof. Another object of the invention is to provide an active matrix liquid crystal display device using this type of TFT.
In order to solve the above stated problems, a blocking layer is f
Asami Taketomi
Hayakawa Masahiko
Kitakado Hidehito
Yamazaki Shunpei
Cook Alex McFarron Manzo Cummings & Mehler, Ltd.
Pert Evan
Semiconductor Energy Laboratory Co,. Ltd.
Sherry Michael
LandOfFree
Oxynitride laminate “blocking layer” for thin... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Oxynitride laminate “blocking layer” for thin..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Oxynitride laminate “blocking layer” for thin... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2996847