Overvoltage tolerant input buffer

Details Overvoltage tolerant input buffer Overvoltage tolerant input buffer

2006-08-29

2006-08-29

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Interface

Supply voltage level shifting

C326S068000

Reexamination Certificate

active

07098694

ABSTRACT:
When a P-channel pass gate transistor is added in parallel to an N-channel pass gate, the resulting circuit improves overvoltage tolerance of an input buffer. A simple bias circuit including two small transistors controls a gate of this P-channel pass gate transistor in such a way that it is turned OFF when an overvoltage is applied, but turned ON when a normal voltage is applied. Another embodiment has two N-channel devices (M12, M13) coupled in series with each other and one of the N-channel devices (M13) being configured in a “turned off” position, by coupling the source and gate terminals to a ground voltage (VSS) and providing the supply voltage (VDD) at the gate terminal of another N-channel device (M12), whereby the device M12protects the device M13from overvoltage.

REFERENCES:
patent: 5894230 (1999-04-01), Voldman
patent: 6031393 (2000-02-01), Wayner

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