Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2000-08-31
2003-03-25
Cuneo, Kamand (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S127000
Reexamination Certificate
active
06537853
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method of encapsulating an article and, more specifically, to a method of overmolding an article and an overmolded encapsulated article made therefrom.
2. Description of the Background
It is well known that electronic devices are sensitive and thus require protection from physical and environmental conditions which may degrade or completely ruin them. Therefore, it is well known in the art to protect electronic devices from these conditions by sealing them with a protective encapsulation material. This “packaging” of the electronic devices protects them from the conditions which may degrade them and allows the devices to be transported and handled, and thus allows them to be easily configured with other components.
One prior-art method for encapsulating devices is the “transfer-molding” method. Transfer molding is a process through which an encapsulating material, such as a thermosetting material, is caused to flow into a cavity formed by components of a mold. The thermosetting material enters into the cavity and flows over the electronic device[s] that is[are] located within the cavity and is then “cured” so that the resin hardens into a non-flowable state. Traditionally it has been important to control the flow of the material into the cavity for a number of reasons, including: to provide void-free fill over the electrical device, to control the flow of the material so as to not contaminate unwanted areas with the encapsulating material, and to control the flow of the material so as to not cause any wire displacement or other damage to the assembly.
Also, it is well known in the art to use mechanical clamping mechanisms as sealing devices in conjunction with the molding cavity to attempt to contain the thermosetting resin within the cavity prior to curing. However, because mechanical clamps must be applied in a symmetrical fashion, i.e. equal and opposite clamping forces, the configuration of the molds is limited to symmetrical designs.
Therefore there is a need for an improved encapsulation method for transfer molding electronic devices which provides a leak proof sealing mechanism for asymmetric designs while using current equipment and known materials and techniques.
Additionally, many competing packaging technologies are available for main and cache memory chips. For example, plastic quad flat pack (PQFD), Swiss outline package (SOP), Swiss outline J-leaded (SOJ), small outline IC (SOIC), thin quad flat pack (TQFP), thin small outline package (TSOP) direct chip attachment on PCB (DCA), and chip scale package (CSP) are all available for use in connection with memory chips. Each of these types of packaging has its own unique advantages, and the selection of a packaging type is often dictated by such advantages. For example, PQFPs are considered by some as the most cost-effective packages for surface mount technology. This type of packaging is often used to house one or more cache memories. On the other hand, TSOP is a very low profile plastic package which is specifically designed to house SRAM, DRAM, and flash memory chips for space limited applications.
Although the CSP is a relatively new packaging technology, there are more than forty different CSPs reported in the literature with most uses being for SRAMs, DRAMs, and flash memory chips. CSPs are also used for application specific ICs (ASICs) and microprocessors in cases where the pin count is not too high. The unique feature of most CSPs is the use of a substrate to redistribute the very fine-pitch of the peripheral pads on the chip to a much larger pitch of the pads on the substrate. With the substrate, the CSP is easier to test at high speeds and to perform burn-in than, for example, the DCA package. Because of the standard size, another advantage of the CSP is ease of assembly or rework. The CSP also provides for physical protection of the die and is less susceptible to die shrinkage.
However, it is often desirable to mount a memory chip directly onto a board. With the CSP, the chip is already mounted to a substrate such that the ability to directly mount the chip to a board is lost. Thus, the need exists for a CSP that provides all the advantages of the CSP but without the need for a substrate.
SUMMARY OF THE INVENTION
The present invention, in its broadest form, is directed to a method of sealing an article to be encapsulated in which a first seal is created, using a clamping pressure. The first seal prevents an encapsulating material from escaping from the mold. As the encapsulating material is injected into the mold, a second seal is dynamically formed by the force of the encapsulating material acting on the article being encapsulated.
The present invention also provides a method of encapsulating an article having first and second surfaces comprising, positioning the article on a carrier such that at least a portion of the first surface contacts the carrier, positioning a portion of the carrier carrying the article within a mold, forming a seal between the mold and the carrier, and filling the mold with an encapsulating material in a manner that forms a seal between the article and the carrier.
Additionally, the present invention is directed to a chip scale packaged die having no substrate. The present invention combines the advantages of chip scale packaging with the flexibility of direct board mounting. Those advantages and benefits, and others, will be apparent from the Description of the Preferred Embodiment hereinbelow.
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Bolken Todd O.
Johnson Mark S.
Cuneo Kamand
Micro)n Technology, Inc.
Pert Evan
Thorp Reed & Armstrong LLP
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