Overlay marks, methods of overlay mark design and methods of...

Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure

Reexamination Certificate

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C257S797000, C257S618000, C438S975000

Reexamination Certificate

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06921916

ABSTRACT:
An overlay mark for determining the relative position between two or more successive layers of a substrate or between two or more separately generated patterns on a single layer of a substrate is disclosed. The overlay mark includes a plurality of coarsely segmented lines that are formed by a plurality of finely segmented bars. In some cases, the coarsely segmented lines also include at least one dark field while being separated by a plurality of finely segmented bars and at least one clear field. In other cases, the coarsely segmented lines are positioned into at least two groups. The first group of coarsely segmented lines, which are separated by clear fields, are formed by a plurality of finely segmented bars. The second group of coarsely segmented lines, which are separated by dark fields, are also formed by a plurality of finely segmented bars.

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