Overlay accuracy measurement vernier and method of forming...

Details Overlay accuracy measurement vernier and method of forming... Overlay accuracy measurement vernier and method of forming...

2006-06-30

2009-12-29

Huff, Mark F (Department: 1795)

Radiation imagery chemistry: process, composition, or product th

Imaging affecting physical property of radiation sensitive...

Making electrical device

C430S313000, C430S322000, C430S316000, C430S314000, C430S030000, C430S005000, C430S022000, C430S394000, C216S039000, C216S041000, C216S084000

Reexamination Certificate

active

07638263

ABSTRACT:
An overlay accuracy measurement vernier and a method of forming the same. According to one embodiment, the method of forming the overlay accuracy measurement vernier includes the steps of forming a first vernier pattern in a predetermined region on a semiconductor substrate; etching the semiconductor substrate using the first vernier pattern as a mask, forming a trench of a first depth; forming a second vernier pattern having a width wider than that of the first vernier pattern, the second vernier pattern including the first vernier pattern; performing an etch process using the second vernier pattern as a mask, thus forming a trench of a second depth, which has a step of a predetermined width; stripping the first and second vernier patterns and then forming an insulating film to bury the trench; and, etching the insulating film so that the semiconductor substrate of the vernier region is exposed.

REFERENCES:
patent: 5503962 (1996-04-01), Caldwell
patent: 6180537 (2001-01-01), Tseng
patent: 2003/0174879 (2003-09-01), Chen
patent: 2003-272993 (2003-09-01), None
patent: 1020040038035 (2004-05-01), None
patent: 1020050063028 (2005-06-01), None
patent: 1020050111821 (2005-11-01), None

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