Overlapping shape design rule error prevention

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

10710914

ABSTRACT:
A method, system and program product are disclosed that create new shapes at detected shape overlaps and includes those new shapes during routing and net checking when the new shapes require a larger space than any of the overlapping shapes. The invention thus detects and prevents spacing errors without the expense of time consuming design rule checking (DRC), facilitating early detection and prevention of errors.

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Pineda de Gyvezet al., “IC defect sensitivity for footprint-type spot defects”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on vol. 11, Issue 5, May 1992 pp. 638-658.

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