Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate
2007-03-13
2007-03-13
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
Interface
Logic level shifting
C326S083000, C710S302000
Reexamination Certificate
active
10786204
ABSTRACT:
An input buffer circuit and associated method operable in a normal mode and a hot-plug mode. In one example, the input buffer has an input and a buffer output, and the input buffer may include a pull-up path coupled between a first circuit supply and the buffer output; a pull-down path coupled between the buffer output and a ground reference voltage; a first transistor coupled between the input and the pull-up path to activate the pull-up path; a second transistor coupled between the input and the pull-down path to activate the pull-down path; and a third transistor for protecting the pull-up path from over-voltage. The input buffer circuit may be configured to prevent an over-voltage condition on each of the plurality of transistors and the input buffer circuit may be configured to allow a hot-plug operation.
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Mathur Manish Kumar
Rohilla Gajender
Brownstein Hyatt Farber Schreck, P.C.
Cho James H.
Cypress Semiconductor Corporation
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