Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-08-09
2010-12-14
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07853907
ABSTRACT:
A novel method for optimizing the implementation of clock gating logic in digital circuits utilizing clock gating. The method over-approximates the clock gating function by removing the variable with the least influence on the resulting approximation function. Approximations of clock gating functions expressed in normal form are performed by removing an appropriate component from the function. Approximations of clock gating functions expressed in conjunctive normal form are performed by removing a clause from the function. Approximations of clock gating functions expressed in disjunctive normal form are performed by removing a literal from a clause in the function.
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Berger Israel
Eisner Cynthia Rae
Itskovich Alexander
Ramon Dan
Chiang Jack
International Business Machines - Corporation
Parihar Suchin
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