Output feedback control circuit for integrated circuit device

Details Output feedback control circuit for integrated circuit device Output feedback control circuit for integrated circuit device

1989-09-15

1991-05-14

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307279, 307469, 365205, 365206, H03K 3356, H03K 3013, H03K 1716, G11C 700

Patent

active

050158910

ABSTRACT:
An output feedback control circuit for an integrated circuit (IC) device is disclosed which includes an I/O line sense amplifier for amplifying the weak signals read out from cells, a read driver for amplifying the output of the I/O line sense amplifier, an output latch/transmission block for latching or transmitting the output signals of the read driver, a precharge block for precharging the output node of the output latch/transmission block, and a state transition detecting block for generating feedback control clocks. If the circuit of the present invention is installed to the output terminal of an IC decive, the data latched at the output node can be maintained regardless of the intruding of an external noise until a precharge clock is generated at a new cycle. Further, the sense amplifier and the read driver are disabled after having amplified the input signals within a single cycle, and therefore, the DC power consumption can be prevented.

REFERENCES:
patent: 4233675 (1980-11-01), Karp et al.
patent: 4546455 (1985-10-01), Iwahashi et al.
patent: 4584493 (1986-04-01), Lee
patent: 4701644 (1987-10-01), Campione
patent: 4808857 (1989-02-01), Naito et al.
patent: 4931675 (1990-06-01), Iwata
Stein et al., "Storage Array and Sense/Refresh Circuit for Single Transistor Memory Cells", SC-7, No. 5, pp. 336-340.

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