Output enable structure and method for a programmable logic devi

Details Output enable structure and method for a programmable logic devi Output enable structure and method for a programmable logic devi

1994-11-21

1996-04-09

Westin, Edward P.

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 56, H03K 19177

Patent

active

055065171

ABSTRACT:
An output enable structure and a method for providing output capability to an input/output cell of a programmable logic device are shown. In one embodiment, one of two global output enable signals, a test output enable signal, and two product term output enable signals is selected for controlling an output buffer of an I/O cell. Additional pin-out flexibility is provided by routing the input signal received at an I/O pin to neighboring I/O cells.

REFERENCES:
patent: 4706216 (1987-11-01), Carter
patent: 4717912 (1988-01-01), Harvey et al.
patent: 4758746 (1988-07-01), Birkner et al.
patent: 4771285 (1988-09-01), Agrawal et al.
patent: 4896296 (1990-01-01), Turner et al.
patent: 4963768 (1990-10-01), Agrawal et al.
patent: 5015885 (1991-05-01), El Gamal et al.
patent: 5185706 (1993-02-01), Agrawal et al.
patent: 5231312 (1993-07-01), Gongwer et al.
patent: 5245226 (1993-09-01), Hood, Jr. et al.
patent: 5302865 (1994-04-01), Steele et al.

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