Output enable signal generating circuit and method of...

Details Output enable signal generating circuit and method of... Output enable signal generating circuit and method of...

2011-01-11

2011-01-11

Pham, Ly D (Department: 2827)

Static information storage and retrieval

Read/write circuit

Signals

C365S191000, C365S193000, C365S196000, C365S233100

Reexamination Certificate

active

07869288

ABSTRACT:
An output enable signal generating circuit for a semiconductor memory apparatus includes an output control unit configured to receive CAS latency information and to generate an output control signal having enable timing according to a DLL on/off mode, and an output enable signal output unit configured to receive the output control signal and to output an output enable signal in response to a read command and a DLL clock signal.

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