Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2005-01-11
2005-01-11
Rinehart, Mark H. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C365S189020, C365S189050
Reexamination Certificate
active
06842815
ABSTRACT:
Output drivers in semiconductor memory devices such as Rambus DRAM prevent degradation of the signal characteristics of a channel bus line in a memory module equipped with the semiconductor memory devices. Each semiconductor memory device includes blocks of memory cells. The data of a memory cell in a block is transmitted to a data input/output line through an output driver for the block. The output driver includes a first transistor connected to a reference voltage (ground) and a second transistor. The first transistor is responsive to the data from the selected block. The second transistor selectively connects the first transistor to the data input/output line in response to a column cycle signal for selecting the block or a read control signal containing calibration information about the characteristics of the data input/output line. Data from the selected block is transmitted to the data input/output line via the first and second transistors when the second transistor responds to the column cycle signal. Accordingly, only the second transistor of the output driver to which a selectively activated channel enable signal is applied in the selected block is turned on, and the output drivers of the unselected data blocks do not increase the capacitance of the channel bus line, thereby allowing transmission of data over the channel bus line without degradation of signal characteristics of the channel bus line.
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Han Kyu-han
Yim Sung-min
Cleary Thomas J.
Harness & Dickey & Pierce P.L.C.
Rinehart Mark H.
Samsung Electronics Co. LTD
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