Output circuit of semiconductor memory device

Details Output circuit of semiconductor memory device Output circuit of semiconductor memory device

1998-08-26

2000-04-18

Nguyen, Tan T.

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

36518905, G11C 700

Patent

active

060523174

ABSTRACT:
An output circuit of a semiconductor memory device is made up of a level recognition circuit which outputs a feedback signal by comparing an output node and a second reference voltage, and a P-channel MOS transistor and an N-channel MOS transistor which complimentary turn on and off in response to the feedback signal. As a result, when a charge of the output node is not sufficient, the output node is charged by setting a voltage of a power supply node to a power supply voltage Vcc. Then, when the output node is sufficiently charged, the N-channel MOS transistor turns on, and as a result the voltage of the power supply node is set to a first reference voltage. Accordingly, the output circuit of the semiconductor memory device achieve an increased operation speed and decreased voltage level amplitude at the output node.

REFERENCES:
patent: 5260901 (1993-11-01), Nagase et al.
patent: 5331593 (1994-07-01), Merritt et al.
patent: 5701090 (1997-12-01), Hidaka et al.

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