Output circuit of semiconductor integrated circuit device

Details Output circuit of semiconductor integrated circuit device Output circuit of semiconductor integrated circuit device

1995-09-05

1996-07-16

Westin, Edward P.

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326 83, 327543, H03K 190185, H03K 190948

Patent

active

055370594

ABSTRACT:
An output circuit of a semiconductor integrated circuit device is obtained which can externally produce a signal lager in amplitude than an internal signal amplitude without degrading reliability of miniaturized transistors. A PMOS transistor (23) and an NMOS transistor (24) connected to an output terminal (5) cooperatively output a potential (V.sub.DD2) at a power source or a potential (V.sub.SS) at a ground as output voltage. A potential of an input signal, a potential (V.sub.DD1) at a power source or the potential V.sub.SS at the ground, are converted by a first converting unit (K2) and a second converting unit (K3) to apply to a gate of the PMOS transistor (23). The first converting unit (k2) and the second converting unit (K3) utilize potential developed by an intermediate potential generating circuit and the potential (V.sub.DD1) at the power source to convert the potential of the input signal. Thus, an output signal having a larger amplitude than the input signal amplitude can be produced without applying the potential difference of the potential (V.sub.DD2) from the ground potential (V.sub.SS) to insulated gate transistors (12 to 23) constituting the output circuit between their respective gates and substrate.

REFERENCES:
patent: 5021684 (1991-06-01), Ahuja et al.
patent: 5109187 (1992-04-01), Guliani
patent: 5136191 (1992-08-01), Nunogami
patent: 5179297 (1993-01-01), Hsueh et al.
patent: 5204557 (1993-04-01), Nguyen
patent: 5270589 (1993-12-01), Sawada et al.
patent: 5300832 (1994-04-01), Rogers
Proceedings of the IEEE 1992 Custom Integrated Circuits Conference, May 1992, Makoto Takahashi, et al., "3.3V-5V Compatible I/O Circuit Without Thick Gate Oxide", pp. 23.3.1 to 23.3.4.

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