Output circuit of a static random access memory circuit

Static information storage and retrieval – Read/write circuit – Including specified plural element logic arrangement

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3652335, G11C 700

Patent

active

048932760

ABSTRACT:
An output circuit of a static random access memory is designed to set the output voltage of the data output circuit to an intermediate voltage by detecting the transition of the address signal before the data in a memory cell is read out from the memory cell, and then, the output voltage of the data output circuit is changed from the intermediate voltage to an H level or from the intermediate voltage to an L level. In this way, since the output voltage changes from the intermediate voltage to an H level or an L level, the transition time of the output voltage is shortened, and therefore the speed of a data reading operation may be increased. At the same time, the momentary current through the data output circuit may be decreased.

REFERENCES:
patent: 4570091 (1986-02-01), Yasuda et al.
patent: 4724340 (1988-02-01), Sood

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