Electronic digital logic circuitry – Interface – Supply voltage level shifting
Patent
1997-04-21
1998-11-03
Santamauro, Jon
Electronic digital logic circuitry
Interface
Supply voltage level shifting
326 27, 326 58, 326 86, H03K 190185, H03K 190948
Patent
active
058314490
ABSTRACT:
An output circuit comprising an output stage and a control signal generator. The output stage is constituted by a first P-channel MOS transistor and an N-channel MOS transistor. The control signal generator generates a signal for driving the gates of the MOS transistors, it comprises a NAND gate, a NOR gate NOR1 and an inverter INV1. The first P-channel MOS transistor of the output stage has a source and a back gate which are isolated in terms of potential. A second P-channel MOS transistor is provided, whose source-drain path is connected between the back gate and gate of the first P-channel MOS transistor incorporated in the output stage.
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Kinugasa Masanori
Shigehara Hiroshi
Kabushiki Kaisha Toshiba
Santamauro Jon
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