Output circuit for semiconductor memory device realizing extende

Details Output circuit for semiconductor memory device realizing extende Output circuit for semiconductor memory device realizing extende

1994-03-08

1995-07-25

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Signals

36518905, 36518908, 365193, 36523008, 365233, 3652385, G11C 700

Patent

active

054368650

ABSTRACT:
In an output circuit for a semiconductor memory, configured to continue to output a memory data even if a column address strobe signal supplied from an external device to the semiconductor memory is disabled, a logic circuit receiving the column address strobe signal generates a latch signal which is inactivated immediately when the column address strobe signal is enabled but which is activated with a delay when the column address strobe signal is disabled. A latch circuit latches a read amplifier output signal in response to the latch signal, and an output buffer receives an output of the latch circuit to output a data signal.

REFERENCES:
patent: 4586167 (1986-04-01), Fujishima et al.
patent: 5022011 (1991-06-01), Allan
patent: 5264737 (1993-11-01), Oikawa
patent: 5305271 (1994-04-01), Watanabe
patent: 5325330 (1994-06-01), Morgan

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