Electronic digital logic circuitry – Interface – Current driving
Patent
1997-08-29
1999-10-12
Santamauro, Jon
Electronic digital logic circuitry
Interface
Current driving
326 27, 326 58, H03K 190185
Patent
active
059660317
ABSTRACT:
An output circuit for an integrated circuit device in which first and second power wirings are connected to a high-potential power terminal, third and fourth power wirings are connected to a low-potential power terminal, and a plurality of inverters are responsive, respectively, to a plurality of bit data signals, each being formed of P-channel and N-channel MOS transistors having drains thereof connected together, a junction of which forms an output terminal. First to fourth auxiliary transistors are provided for each of the inverters, which are connected, respectively, between the first power wiring and the source of the P-channel MOS transistor, between the second power wiring and the source of the P-channel MOS transistor, between the third power wiring and the source of the N-channel MOS transistor, and between the fourth power wiring and the source of the N-channel MOS transistor. First and second circuits are provided for each inverter and operable in response to one of the bit signals corresponding to each inverter to control the transistors ON and OFF states.
REFERENCES:
patent: 5144161 (1992-09-01), Inaba
patent: 5319260 (1994-06-01), Wanlass
patent: 5534791 (1996-07-01), Mattos et al.
patent: 5537060 (1996-07-01), Baek
patent: 5583451 (1996-12-01), Sharpe-Geisler
patent: 5670894 (1997-09-01), Takaishi et al.
patent: 5719509 (1998-02-01), Chan
Santamauro Jon
Yahama Corporation
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