Output circuit for conversion from CMOS circuit level to ECL cir

Details Output circuit for conversion from CMOS circuit level to ECL cir Output circuit for conversion from CMOS circuit level to ECL cir

1997-06-27

1999-08-31

Santamauro, Jon

Electronic digital logic circuitry

Interface

Logic level shifting

326 31, 326 84, H03K 190175

Patent

active

059458429

ABSTRACT:
A first load 10 is connected between a signal terminal 12 for driving an output transistor 11 and a highest potential VCC. A first switch 7 is connected in parallel with the first load 10. A second switch 8 is connected between the signal terminal 12 and a current source 14. A third switch 9 is connected between the highest potential VCC and the current source 14. The first to third switches are on-off operated according to a CMOS level input to provide an ECL level from an output transistor. The current source 14 includes a bipolar transistor 1 and a resistor 2, thereby occupying only a small area and precluding output fluctuations due to fluctuations in manufacture.

REFERENCES:
patent: 4912347 (1990-03-01), Morris
patent: 5670893 (1997-09-01), Okamura

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