Output circuit device preventing overshoot and undershoot

Electronic digital logic circuitry – Interface – Current driving

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Details

326 27, 326 34, 327110, H03K 1716, H03K 190175

Patent

active

058015507

ABSTRACT:
The pulse output circuit device comprises two transistors (2, 4) for constructing an output buffer, a transistor (7) connected between the output line (OUTP) of the output buffer and the high potential supply voltage (VDD), a transistor (8) connected between the output line (OUT) of the output buffer and the low potential supply voltage (GND), a control circuit (39) for applying a gate signal to the transistor (7), and a control circuit (40) for applying a gate signal to the transistor (8). Whenever the signal level of the output buffer changes, the two control circuits (39, 40) turn on the transistor (7) or the transistor (8) for sharp level transition at the start of level transition, but turn on the transistor (7) or the transistor (8) on the basis of the relationship between the output level of the control circuit (39, 40) and the operating point of the transistor (7) or the transistor (8) at the end of level transition for absorption of the charge and discharge current to and from a parasitic capacitance (27). In the pulse output circuit device, it is possible to effectively prevent overshoot and undershoot caused when a pulse signal is outputted therethrough, while keeping the high output response speed and without increasing the circuit area.

REFERENCES:
patent: 4829199 (1989-05-01), Prater
patent: 4961010 (1990-10-01), Davis
patent: 5212801 (1993-05-01), Farmer
patent: 5517129 (1996-05-01), Matsui
patent: 5534791 (1996-07-01), Mattos et al.

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