Output circuit

Details Output circuit Output circuit

1996-09-19

1998-11-10

Santamauro, Jon

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326 58, 326 86, H03K 190185

Patent

active

058349480

ABSTRACT:
An output circuit serving as an interface between an LSI and an external LSI, even though the power voltage of the external LSI is not less than the withstand voltage of the gate oxide layer of each of the MOS transistors forming the output circuit, can supply, from the output unit thereof, a signal of which amplitude is equal to the power voltage of the external LSI without a voltage not less than the withstand voltage above-mentioned applied to the gate oxide layer of each of the MOS transistors. A pull-up circuit for pulling up the potential of the output unit comprises first and second PMOSs being connected in series between the power of the external LSI and the output unit, the first PMOS receiving a pull-up control signal at the gate thereof. A pull-down circuit for pulling down the potential of the output unit comprises first and second NMOSs being connected in series between the output unit and the ground, the first NMOS receiving a pull-down control signal S.sub.d at the gate thereof. A voltage conversion circuit is arranged such that, when pulling up the potential of the output unit, there is supplied the pull-up control signal having such a potential with which the first PMOS is turned on and with which a voltage not less than the withstand voltage of the gate oxide layer is not applied to the gate oxide layer.

REFERENCES:
patent: 4709162 (1987-11-01), Braceras et al.
patent: 5151619 (1992-09-01), Austin et al.
patent: 5243236 (1993-09-01), McDaniel
patent: 5300802 (1994-04-01), Rogers
patent: 5440249 (1995-08-01), Schucker et al.
patent: 5506535 (1996-04-01), Ratner
patent: 5537059 (1996-07-01), Asahina
patent: 5559464 (1996-09-01), Orii et al.

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