Output circuit

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Details

C326S017000, C326S027000, C327S205000

Reexamination Certificate

active

07663406

ABSTRACT:
An output circuit including an input terminal; an output terminal; a PMOS transistor connected with a positive side of a power voltage and the output terminal; a NMOS transistor connected with a negative side of the power supply voltage and the output terminal; a first inverter, to which a gate voltage of the PMOS transistor is input and which exhibits hysteresis in threshold voltage; and a second inverter, to which a gate voltage of the NMOS transistor is input and which exhibits hysteresis in threshold voltage, wherein an OR logic signal of the input signal and a signal obtained by inverting an output signal from the second inverter is input to a gate of the PMOS transistor, and an AND logic signal of the input signal and a signal obtained by inverting an output signal from the first inverter is input to a gate of the NMOS transistor.

REFERENCES:
patent: 4953070 (1990-08-01), Lenz
patent: 5698994 (1997-12-01), Tsuji
patent: 4-371021 (1992-12-01), None
patent: 2000-49586 (2000-02-01), None
patent: 2002-297248 (2002-10-01), None

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