Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Patent
1997-07-22
1999-11-09
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
711104, 710 52, 710129, 710130, 710 49, 710262, 365120, 36518901, 36518905, 365190, 365233, 365202, G06F 1300, G06F 300
Patent
active
059833149
ABSTRACT:
A maskable data output buffer includes an output stage receiving data signals from a data coder. The signals output from the data coder are normally complementary data signals corresponding to complementary data input signals. However, in response to receiving a mask signal, the data coder forces the output signals to be other than complementary. The output stage normally generates a data output signal corresponding to the complementary data input signals. However, when the data input signals are other than complementary, the output of the output stage assumes a high impedance condition. Since the timing of the high impedance condition is determined from the data signals themselves, the timing of the mask operation is inherently properly timed to the output of the data from the data output buffer.
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Cabeca John W.
Micro)n Technology, Inc.
Tran Denise
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