Output buffer current slew rate control integrated circuit

Details Output buffer current slew rate control integrated circuit Output buffer current slew rate control integrated circuit

1995-04-19

1997-04-22

Hudspeth, David R.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

326 26, 326 83, H03K 1716

Patent

active

056232160

ABSTRACT:
An output buffer current slew rate control integrated circuit includes an output buffer having first, MOS-type transistor means for supplying a current to a load impedance. Current generator means generate a constant current and are activated upon switching of an input signal of the output buffer. The current generator means drive a control input of the first transistor means for driving the first transistor means with a driving voltage having a slew rate determined by the constant current.

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Hussein I. Hanafi et al., "Design and Characterization of CMOS Off-Chip Driver/Receiver with Reduced Power-Supply Disturbance", IEEE Journal of Solid-State Circuits, vol. 27, No. 5:pp. 783-790, May 27, 1992.

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