Output buffer controlling circuit of a multibit integrated circu

Details Output buffer controlling circuit of a multibit integrated circu Output buffer controlling circuit of a multibit integrated circu

1996-05-24

1998-05-19

Westin, Edward P.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

326 27, 326 83, H03K 1716

Patent

active

057540586

ABSTRACT:
An output buffer controlling circuit of a multibit integrated circuit is disclosed including: a pulse generating circuit for generating pulses by the combination of a first output enable signal and the output signal of an external sense amplifier; a high voltage sensing circuit for generating a high voltage sensing signal, when an input power voltage is high; and a delay circuit for generating a control signal for sequentially operating the output buffers in series so that the pulses generated from the pulse generating circuit have delay times different from one another according to the high voltage sensing signal generated from the high voltage sensing circuit.

REFERENCES:
patent: 4587445 (1986-05-01), Kanuma
patent: 4857765 (1989-08-01), Cahill et al.
patent: 4958086 (1990-09-01), Wang et al.
patent: 5194763 (1993-03-01), Suzuki et al.
patent: 5572145 (1996-11-01), Kinsella
patent: 5646543 (1997-07-01), Rainal

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