Output buffer circuits for reducing ground bounce noise

Details Output buffer circuits for reducing ground bounce noise Output buffer circuits for reducing ground bounce noise

1991-05-21

1993-12-07

Sikes, William L.

Static information storage and retrieval

Read/write circuit

Noise suppression

307443, 307542, 307263, 307473, G11C 702, H03K 1716

Patent

active

052688682

ABSTRACT:
An output circuit is provided which includes a first switch coupled between a first power supply terminal and an output terminal, a second switch coupled between the first power supply terminal and the output terminal, an arrangement to set the output terminal at a high impedance state, and a first variable delay coupled to a first input terminal for turning on the first switch and the second switch with different timing from each other and for turning off the first switch and the second switch simultaneously. In addition, the output circuit includes a third switch coupled between the output terminal and a second power supply terminal, a fourth switch coupled between the output terminal and the second power supply terminal, and a second variable delay coupled to a second input terminal for turning on the third switch and the fourth switch with different timing from each other and for turning off the third switch and the fourth switch simultaneously.

REFERENCES:
patent: 4777389 (1988-10-01), Wu et al.
patent: 4785203 (1988-11-01), Nakamura
patent: 4789796 (1988-12-01), Foss
patent: 4820942 (1989-04-01), Chan
patent: 4928023 (1990-05-01), Marshall
patent: 5001369 (1991-03-01), Lee
patent: 5121013 (1992-06-01), Chuang et al.

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