Output buffer circuit having signal path used for testing...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Reexamination Certificate

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10851332

ABSTRACT:
An output buffer circuit includes a signal path used for testing and designed for outputting output signals at predetermined logic levels in response to internal output signals from an internal logic circuit. The output buffer circuit and includes a first control input, a second control input, a test signal input circuit, and a plurality of output buffers. The first control input receives a predetermined control signal. The second control input receives a test signal having a predetermined voltage. The test signal input circuit switches between a test mode and a normal mode in response to the control signal, receives and outputs the test signal while in the test mode, and receives and outputs the internal output signals while in the normal mode. The plurality of output buffers output the output signals through a plurality of outputs, in response to the internal output signals or the test signal. The output buffer circuit, and a test method using the same, are advantageous in that the characteristics of the output buffers can be exactly evaluated without being affected by the internal logic circuit.

REFERENCES:
patent: 4357703 (1982-11-01), Van Brunt
patent: 4931722 (1990-06-01), Stoica
patent: 5046048 (1991-09-01), Atsumi et al.
patent: 5377144 (1994-12-01), Brown
patent: 5381372 (1995-01-01), Kozuka et al.
patent: 6286120 (2001-09-01), Reichert et al.
patent: 6469534 (2002-10-01), Kimura
patent: 6539511 (2003-03-01), Hashizume
patent: 2002/0184583 (2002-12-01), Hikone et al.
patent: 1993-0003179 (1992-03-01), None
patent: 10-0228371 (1999-11-01), None

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