Output buffer circuit having low noise characteristics

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction

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Details

326 33, 326 83, H03K 1716

Patent

active

056044488

ABSTRACT:
Disclosed is an output buffer circuit having low noise characteristics, comprising a control section for detecting whether a driving voltage of more than a normal voltage is applied or not, and generating a control signal on the basis of detection result thereof; and a pull-up section for enabling a voltage down to be selectively caused between a driving voltage supplying terminal and an output terminal of said buffer circuit in response to said control signal. By the output buffer, it is possible to considerably reduce a ground bounce noise occurring upon a driving voltage of more than a normal voltage being applied. Thus, the total ground level of a semiconductor device, in which the output buffer is embodied, can be stabilized, and therefore stability of the device can be enhanced.

REFERENCES:
patent: 4719369 (1988-01-01), Asano et al.
patent: 5017807 (1991-05-01), Kriz et al.
patent: 5124579 (1992-06-01), Naghashinsh
patent: 5194764 (1993-03-01), Yano et al.
patent: 5315187 (1994-05-01), Cheng
patent: 5512844 (1996-04-01), Nakakura et al.

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