Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
1999-07-02
2001-01-16
Nelms, David (Department: 2818)
Electronic digital logic circuitry
Interface
Current driving
C365S185030
Reexamination Certificate
active
06175250
ABSTRACT:
The present invention relates to an output buffer circuit for driving a transmission line, the output impedance of the output buffer circuit being adjustable to match the characteristic impedance of a transmission line connected to the output buffer.
With the ever increasing operating speed of digital circuitry, also the demands on interfaces linking different circuit components regarding data transmission capacity will increase. The higher the bit rate to be transmitted via a transmission line, the more important is that both the transmitting side and the receiving side connected via the transmission line, have a source impedance and an input impedance, respectively, which match the characteristic impedance of the transmission line. Such impedance matching is inevitable for avoiding reflections on the transmission line which might otherwise disturb data transmission at high data rates.
U.S. Pat. No. 5,134,311 discloses a self-adjusting impedance matching driver circuit having an array of pull-up gates to VDD and an array of pull-down gates to ground. One or more of such gates is selectively enabled in response to circuit means that monitors the impedance match between the output of the driver circuit and the network it drives. For this purpose a comparator has an input connected to the output of the driver circuit and an output that controls latches for selectively enabling one or more of said pull-up gates and other latches for controlling one or more of said pull-down gates, such that closed loop output impedance control is performed.
IEEE International Solid State Circuits Conference 1993, Session 10, High Speed Communication and Interfaces, paper 10.7 discloses a circuit for performing automatic impedance matching between a CMOS output buffer circuit and an externally connected transmission line. According to that proposal, impulses are output by the driver circuit to the transmission line, and during a period of time prior to the arrival of possible reflections from the end of the transmission line, the output voltage of the buffer is controlled to half the supply voltage, implying that then the output impedance of the buffer equals the characteristic impedance of the line. Such control is performed independently for the pull-up gate of the CMOS driver and the pull-down gate of the CMOS driver, each of these gates comprising an array of drive transistors selectively enabled by an impedance control register.
Both these approaches of the prior art adopt some kind of control loop for adjusting the output impedance of a line driver circuit, the control loop including the detection of the actual output impedance and the adjustment of impedance means determining the actual output impedance of the driver, such that the detected-output impedance matches a desired value.
However, detecting the actual output impedance of the buffer is not easily possible on a continuous basis, without interfering with the data transmission that takes place. For this reason, the first mentioned approach suggests setting up the output buffer at power up and thereafter only if the driven network is changed substantially. The second approach suffers from extreme timing demands due to the fact that output impedance detection has to take place before a possible reflection from the end of the transmission line has arrived at its beginning.
It is the object of the present invention, to provide an output buffer circuit having an output impedance which can be adjusted to a desired impedance value with a simple circuit that allows control of the output impedance while data transmission takes place and without strict requirements on the precision of the components or on timing and speed of the impedance adjustment circuit.
According to the present invention this object is solved as defined in the independent claim. Advantageous embodiments are described in the dependent claims.
According to the present invention, the output impedance of an output buffer circuit is controlled by means of controlling the impedance of a monitor impedance means having electrical characteristics similar to the electrical characteristics of the buffer circuit components determining the output impedance of the buffer. An impedance control signal for adjusting the buffer output impedance is derived from a monitor control signal adjusting or controlling the impedance of the monitor impedance means.
In this context, “derived” has the meaning that the derived control signal is a predetermined function of the monitor control signal. In the simplest and preferred case, the derived control signal is identical with the monitor control signal. Depending on design parameters of the monitor component in relation to corresponding design parameters of the components determining the actual output impedance of the buffer circuit, other functional relations may be appropriate, e.g. a proportionality between the monitor control signal and the output impedance control signal.
The components determining the actual output impedance and the monitor impedance means are designed such that they will behave similar, and such that external influences like temperature as well as process variations during their manufacture will have similar influence on both. This can be achieved e.g. by means of manufacturing both components on the same semiconductor chip and by the same process, as is well known as such. Preferably, the electrical circuit environment of the monitor components is designed to be similar to the electrical circuit environment of the components determining the output impedance of the buffer.
Accordingly, the adjustment of the monitor components to a desired impedance value will result in that the components determining the output impedance have a corresponding desired impedance value.
The monitor impedance means can be a component functionally and structurally separate from the components determining the actual output impedance and the components involved in the transmission of data signals.
According to a preferred embodiment of the present invention, an output buffer circuit and an input buffer circuit can be provided on the same chip and use the same impedance controlled monitor impedance means for deriving adjustment signals both for the output impedance means and for the input termination impedance means or for output impedance means and input impedance means, respectively, of a plurality of buffer circuits for a plurality of signal channels.
According to a preferred embodiment, an output stage of an output buffer circuit according to the present invention comprises a structure having a first functional layer for switching between an input port connected to a voltage source and an output port connected to the transmission line, in accordance with data to be transmitted, and a second functional layer for determining the source impedance of this voltage source.
The first functional layer may comprise a bridge circuit including four switches for driving a symmetrical transmission line or a pair of switches for driving an asymmetric transmission line.
The second layer preferably comprises controllable impedance means connected in series with the first layer and connected between power supply terminals supplying operating power to the buffer. The impedance means may be embodied as field effect transistors, preferably MOSFETS.
According to a preferred embodiment, the monitor impedance means are replicas of the MOSFETs included in the second functional layer for determining the output impedance.
The term “replica of an element” denotes in particular a copy of the element, the copy having substantially identical physical dimensions (like width, height, depth) and parameters (like impurity concentration, type, doping method etc.) manufactured with the same process, and consequently, having substantially identical electrical characteristics. In a more general sense this term also denotes elements not being identical in all dimensions and parameters but having electrical characteristics in a predetermined relationship with the element. This will be th
Jenkens & Gilchrist P.C.
Le Thong
Nelms David
Telefonaktiebolaget L M Ericsson (publ)
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