Output buffer circuit and semiconductor device

Details Output buffer circuit and semiconductor device Output buffer circuit and semiconductor device

2007-11-27

2007-11-27

Le, Don (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

C326S083000

Reexamination Certificate

active

11242052

ABSTRACT:
Disclosed is an output buffer circuit provided with a pre-emphasis function, including a first buffer circuit, receiving a first logic signal to drive a transmission line, and a second buffer circuit. The second buffer circuit includes an inverting buffer, receiving a second logic signal that is in a predetermined logical relationship with respect to the aforementioned first logic signal, and having outputs connected in common with an output of the aforementioned first buffer circuit, a first switch, connected across the inverting buffer and a first power supply, and controlled to be turned on or off based on a signal supplied to a control terminal, and a second switch, connected across the inverting buffer and a second power supply and controlled to be turned on or off based on a signal supplied to a control terminal in association operatively with the first switch. The output buffer circuit also includes first and second capacitors across an input end of the first buffer circuit and a connection node between the inverting buffer and the first switch and across the input end of the first buffer circuit and a connection node between the inverting buffer and the second switch.

REFERENCES:
patent: 6031389 (2000-02-01), Fotouhi et al.
patent: 6094086 (2000-07-01), Chow
patent: 6236239 (2001-05-01), Kogushi
patent: 6606271 (2003-08-01), Hunt
patent: 2002-94365 (2002-03-01), None

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