Output buffer circuit and differential output buffer...

Details Output buffer circuit and differential output buffer... Output buffer circuit and differential output buffer...

2011-06-28

2011-06-28

Barnie, Rexford N (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S087000, C326S030000

Reexamination Certificate

active

07969197

ABSTRACT:
An output buffer includes inverters, a delay circuit for delaying an input signal, buffers and switches. The output buffer transmits a logic signal to a transmission path and, in accordance with an amount of signal attenuation in the transmission path, creates a waveform including four or more kinds of signal voltages. The buffers are redundantly connected in parallel, and the number of buffers concurrently turn ON is controlled by respective switches provided in series with output resistors of the buffers. By selecting the buffers of switches which are turned ON, the preemphasis amount and a number of preemphasis taps are adjusted through a selector logic selection signal so that the preemphasis amount is made variable and the ON resistance of the buffers is made constant.

REFERENCES:
patent: 7800399 (2010-09-01), Schumann
patent: 2002/0030517 (2002-03-01), Kurisu et al.
patent: 2003/0193351 (2003-10-01), Fukui
patent: 2006/0071687 (2006-04-01), Kim
patent: 2007/0050572 (2007-03-01), Tanaka
patent: 2001-326417 (2001-11-01), None
patent: 2001-352238 (2001-12-01), None
patent: 2002-208969 (2002-07-01), None
patent: 2002-223161 (2002-08-01), None
patent: 2006-109093 (2006-04-01), None

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