Output buffer circuit

Details Output buffer circuit Output buffer circuit

2008-05-27

2008-05-27

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S086000

Reexamination Certificate

active

07378877

ABSTRACT:
An output buffer with a pre-emphasis function to deliver a logic signal to a transmission line as a distributed constant circuit includes a first buffer to receive a first signal assigning a logical value to a logic signal to thereby drive the transmission line, a second buffer to receive a second signal having a predetermined logical relationship with the first signal to thereby drive the line in cooperation with the first buffer, and a unit to detect a change in the logical value of the logic signal. The second buffer is higher in output impedance than the first buffer on condition that attenuation of a signal through the line is reduced. If a de-emphasis state continues, a data generator creates a control signal such that the second buffer cooperates with the first buffer to drive the transmission line. The output buffer circuits therefore operate with low power consumption even if the de-emphasis state continues.

REFERENCES:
patent: 6772250 (2004-08-01), Dreps et al.
patent: 7112989 (2006-09-01), Ooshita et al.
patent: 2002/0030517 (2002-03-01), Kurisu et al.
patent: 2002/0118042 (2002-08-01), Helt et al.
patent: 2003/0193351 (2003-10-01), Fukui
patent: 2000-68816 (2000-03-01), None
patent: 2002-94365 (2002-03-01), None

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