Out-of-order processing with predicate prediction and...

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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C711S155000

Reexamination Certificate

active

07380111

ABSTRACT:
A method for processing registers in an out-of-order processor. A predicate in an instruction is predicted. An architecturally correct value is then computed using a read-modify-write operation. The predicted value is compared to the architecturally correct value. The instruction with an incorrectly-predicted predicate is flushed from the pipeline if the predicted value and the architecturally correct value are different.

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