Optoelectronic packages and methods to simultaneously couple...

Optical waveguides – Integrated optical circuit

Reexamination Certificate

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Details

C385S088000, C385S094000, C385S129000

Reexamination Certificate

active

06834133

ABSTRACT:

FIELD OF THE DISCLOSURE
The present disclosure relates generally to optical packages and, more particularly, to methods to simultaneously optically and electrically couple an optoelectronic chip to a waveguide and substrate.
BACKGROUND
Optical packages are typically manufactured using traditional methods that enable optoelectronic chips to communicate with other optoelectronic chips using optical signal transmissions. These traditional methods often include wire-bonding and/or flip-chip packaging processes. It is known that these optical packages are generally used in an optical communication system for transmitting and receiving high bandwidth optical signals.
Optical wire-bond packages and optical flip-chip packages both generally include an optoelectronic chip, a substrate and a light conducting element such as, for example, an optical fiber or a waveguide. The optoelectronic chip includes an optical element and electrically conductive contacts. The optical element, which may include a transmitter and/or receiver, is generally responsible for transmitting and/or receiving optical signals through the optical fiber and/or waveguide. The optical fiber and/or waveguide is generally adhered or attached to a substrate. Additionally, electrically conductive contacts are electrically bonded to a substrate for transmitting and/or receiving electrical signals.
A wire-bonding packaging process is generally carried out by individually bonding each electrically conductive contact of an optoelectronic chip to a substrate using wire (e.g., gold wire, aluminum wire, etc.) and a wire-bonding machine. This is a time consuming process. The time required to wire-bond each optical package impacts the overall time and cost related to implementing and executing the wire-bonding package manufacturing process. In addition to limitations during the manufacturing process, wire-bonding packaging may suffer from quality and reliability issues of the wire-bond. A typical wire-bond generally has an overall length associated with a distance measured from the optoelectronic chip electrical contact to the substrate. The overall length of the wire-bond may introduce electrical inductance and capacitance, thereby creating undesirable signal bandwidth limitations and signal loss. Additionally, the wire-bond may also be susceptible to quality defects, such as, for example wire-bond breaks or wire-bond detachment. The manufacturing and performance limitations presented here have lead many chip manufacturers to turn to alternate packaging techniques such as flip-chip packaging.
It is known that optical flip-chip packaging is a proven method for manufacturing optical packages. A flip-chip package may include a waveguide that is adhered to a substrate and that is disposed between an optoelectronic chip and the substrate. During a bonding process, the optoelectronic chip is positioned relative to the waveguide using an active alignment process to achieve optimal light signal transmission through the waveguide, thus adding time and cost to the overall flip-chip packaging process. Additionally, the optical flip-chip packaging process generally results in an air gap disposed between the optical element and the waveguide. The air gap results in a chip-air interface and an air-waveguide interface. Fressnel losses and/or beam divergence often occur when light crosses such interfaces. Also, due to the air gap, fluxless soldering processes are generally used to form electrical bonds to prevent flux residues from contaminating an optical path (i.e., the air gap) between the optical element and the waveguide, thereby preventing optical signal loss.


REFERENCES:
patent: 2004/0057648 (2004-03-01), Yunus
patent: 2004/0118599 (2004-06-01), Chason et al.
Baggs, J; Machon, W; Magill, P; Mis, J; Rinne, G. “Solder Alloy Selection for Flip Chip on Board.” International Material and Packaging Society Symposium, Brasleton, Georgia. Feb. 1998. pp. 1-5.
Bogaerts, W; Bienstman, P; Baets, R. “Sidewall Roughness in Photonic Crystal Slabs: A Comparison of High-Contrast Membranes and Low-Contrast III-V Epitaxial Structures.” 11thInternational Workshop on Optical Waveguide Theory and Numerical Modelling, Apr. 4-5, 2003, Prague, Czech Republic. pp. 1-4.
“Polymer Technology Overview.” Optical Crosslinks, Incorporated. 2001. pp. 1-10. Retrieved from internet: <URL: http://www.opticalcrosslinks.com/pdf/WebPolymer/TECHNOLOGyPlatform.pdf>.
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