Optimizing memory operations in an electronic storage device

Details Optimizing memory operations in an electronic storage device Optimizing memory operations in an electronic storage device

2011-08-30

2011-08-30

Farrokh, Hashem (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S203000

Reexamination Certificate

active

08010740

ABSTRACT:
To optimize memory operations, a mapping table may be used that includes: logical fields representing a plurality of LBA sets, including first and second logical fields for representing respectively first and second LBA sets, the first and second LBA sets each representing a consecutive LBA set; PBA fields representing PBAs, including a first PBA disposed for representing a first access parameter set and a second PBA disposed for representing a second access parameter set, each PBA associated with a physical memory location in a memory store, and these logical fields and PBA fields disposed to associate the first and second LBA sets with the first and second PBAs; and, upon receiving an I/O transaction request associated with the first and second LBA sets, the mapping table causes optimized memory operations to be performed on memory locations respectively associated with the first and second PBAs.

REFERENCES:
patent: 2003/0217202 (2003-11-01), Zilberman et al.
patent: 2005/0114587 (2005-05-01), Chou et al.
patent: 2009/0300318 (2009-12-01), Allen et al.
Lee W. Young, PCT/US07/70660 International Search Report (ISR), Nov. 18, 2008, p. 2, International Searching Authority/US, Alexandria, Virginia.
Lee W. Young, PCT/US07/70660 Written Opinion (WO), Nov. 18, 2008, Box V and Supplemental Box, International Searching Authority/US, Alexandria, Virginia.

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