Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-12-26
2006-12-26
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C703S013000, C703S014000
Reexamination Certificate
active
07155685
ABSTRACT:
It is an object of the present invention to provide a method, an apparatus and a program having high optimization precision and capable of obtaining an answer required by a designer in a short time by combining optimization between individual transistors and optimization as the entire circuit, or by appropriately combining judgment of an operation region, an analysis of the operation region and a SWEEP sensitivity analysis when the optimization is carried out. An optimizing designing apparatus of an integrated circuit for designing a circuit, comprises operation region judging means for adjusting an operation region (linear region, saturation region) of the circuit, operation region analysis means for displaying liner characteristics (Ids-Vgs characteristics) of the circuit and saturation characteristics (Ids-Vds characteristics) of the circuit, and SWEEP sensitivity analysis means for displaying variation in output characteristics of the circuit.
REFERENCES:
patent: 6314390 (2001-11-01), Bittner et al.
Silvac International, Simulation Standard, A Journal for Circuit Simulation and SPICE Modleing Engineers, UCSD HBT SmartSpice Model Released, Silvac International, vol. 8, No. 3, Mar. 1997, pp. 1-12.
Avant, Star-Hspice Quick Reference Guide, Release 2001.2, Jun. 2001, pp. 1-3, 113-157, 209-232.
Mori Kenji
Nakajima Takashi
Armstrong Kratz Quintos Hanson & Brooks, LLP
Seiko Instruments Inc.
Sipec Corporation
Whitmore Stacy A
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