Optimized power delivery to high speed, high pin-count devices

Details Optimized power delivery to high speed, high pin-count devices Optimized power delivery to high speed, high pin-count devices

2004-12-28

2009-11-03

Le, Thao X (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Bump leads

C257SE23021, C438S613000

Reexamination Certificate

active

07612449

ABSTRACT:
A high-speed semiconductor device includes a substrate having an upper substrate surface, a lower substrate surface, and a periphery bounding the upper and the lower substrate surfaces, the substrate further having an upper substrate ground trace providing an electrical path to the lower substrate surface through a substrate ground via; an array of solder balls attached to the lower substrate surface, the array of solder balls including a plurality of ground solder balls disposed at the periphery and electrically connected to the substrate ground via.

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