Optimization of low density parity check (LDPC) building...

Details Optimization of low density parity check (LDPC) building... Optimization of low density parity check (LDPC) building...

2006-04-17

2010-02-23

Baderman, Scott T (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S753000, C714S768000

Reexamination Certificate

active

07669106

ABSTRACT:
Described are an iterative decoder and method for implementing an iterative decoder which can be used for error correction in data communications. In one implementation, the method includes implementing a first function including a first plurality of Gilbert cells, and implementing a second function including a second plurality of Gilbert cells, where examples of the first and second functions include an equality constraint function and a parity check function. Each of the first plurality of Gilbert cells and the second plurality of Gilbert cells includes n m-input Gilbert multipliers, in which n is an integer greater than (3) and m=(n−1).

REFERENCES:
patent: 4950917 (1990-08-01), Holler et al.
patent: 5519811 (1996-05-01), Yoneda et al.
patent: 6603722 (2003-08-01), Taguchi et al.
patent: 7027783 (2006-04-01), Vilhonen et al.
patent: 7088981 (2006-08-01), Chang
patent: 7418468 (2008-08-01), Winstead et al.
Saied Hemati; Amir H. Banihashemi,Iterative Decoding in Analog CMOS, 2003, ACM New York, NY, USA.
Ruttik K.,Error Analysis of the CMOS Based Soft Gate for Analog Turbo Decoder,Sep. 5-8, 2004, IEE International Symposium, vol. 2, pp. 1312-1316.
Loeliger, Hans-Andrea et al., “Decoding in Analog VLSI,” IEEE Communications, Apr. 1999, pp. 99-101.
Kschischang, Frank R. et al., “Factor Graphs and the Sum-Product Algorithm,” IEEE Transactions on Information Theory, Feb. 2001, 47(2), pp. 498-519.

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