Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2002-02-25
2004-04-13
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C430S005000, C430S394000
Reexamination Certificate
active
06721938
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to manufacturing small dimension features of objects, such as integrated circuits, using photolithographic masks. More particularly, the present invention relates to phase shift masking of complex layouts for integrated circuits and similar objects as well as proximity correction, including but not limited to optical proximity correction and etch proximity correction, for the same.
2. Description of Related Art
Phase shift masking has been applied to create small dimension features in integrated circuits. Typically the features have been limited to selected elements of the design, which have a small, critical dimension. See, for example, U.S. Pat. No. 5,766,806.
Although manufacturing of small dimension features in integrated circuits has resulted in improved speed and performance, it is desirable to apply phase shift masking more extensively in the manufacturing of such devices. However, the extension of phase shift masking to more complex designs results in a large increase in the complexity of the mask layout problem. For example, when laying out phase shift windows on dense designs, phase conflicts will occur. One type of phase conflict is a location in the layout at which two phase shift windows having the same phase are laid out in proximity to a feature to be exposed by the masks, such as by overlapping of the phase shift windows intended for implementation of adjacent lines in the exposure pattern. If the phase shift windows have the same phase, then they do not result in the optical interference necessary to create the desired feature. Thus, it is necessary to prevent inadvertent layout of phase shift windows in phase conflict near features to be formed in the layer defined by the mask.
Another problem involves efficient layout of optical proximity correction OPC features, and other proximity correction features. In one system provided by the assignee of the present invention, known as iN-Phase 4.0 from Numerical Technologies, Inc., San Jose, Calif., a model OPC feature for OPC of gate shrink designs is featured, and OPC of the phase shift pattern along the gate region to correct for light imbalance is provided.
In the design of a single integrated circuit, millions of features may be laid out. The burden on data processing resources for iterative operations over such large numbers of features can be huge, and in some cases makes the iterative operation impractical. The layout of phase shift windows and the assignment phase shift values to such windows, along with the layout of complementary trim mask patterns, for circuits in which a significant amount of the layout is accomplished by phase shifting, is one such iterative operation which has been impractical using prior art techniques.
Because of these and other complexities, implementation of a phase shift masking technology for complex designs will require improvements in the approach to the design of phase shift masks.
SUMMARY OF THE INVENTION
The present invention provides techniques suitable for use with complex phase shift mask patterns and complementary trim mask patterns, which allow for improved proximity correction.
Thus, a method for producing a computer readable definition of photolithographic mask used to define a target pattern is provided. For the purposes of this description, the phase shift mask patterns and trim mask patterns include shapes having boundaries that are defined by sets of line segments. The phase shift mask patterns include phase shift windows, and the trim mask patterns include trim shapes, which have boundaries defined by such sets of line segments. For a particular pair of phase shift windows used to define a target feature in a target pattern, each of the phase shift windows in the pair can be considered to have a boundary that includes at least one line segment that abuts the target feature. Likewise, a complementary trim shape used in definition of the target feature, for example by including a transmissive region used to clear an unwanted phase transition between the particular pair of phase shift windows, includes at least one line segment that can be considered to abut the target feature. According to the present invention, proximity correction is provided by adjusting the position of the at least one line segment on the boundary of a phase shift windows in said pair which abuts the target feature, and by adjusting the position of the at least one line segment on the boundary of the complementary trim shape which abuts the target feature.
In one embodiment, the at least one line segment on the phase shift windows is defined by dissecting boundaries of the phase shift windows in the pair of phase shift windows at dissection points that are selected according to the shape of the phase shift windows. For example, the dissection points are selected so that they occur along the edge of the target feature at positions corresponding to corners of the phase shift windows. In addition, the at least one line segment on the trim shape is selected by dissecting boundaries of the trim shape at dissection points selected according to the shape of the trim shape. Again, for example the dissection points on the trim shape are selected so that they occur along the edge of the target feature at positions corresponding to corners of the trim shape.
In another embodiment, the pair of phase shift windows discussed in the preceding paragraph includes a complementary phase shift window by which a phase transition is produced that results in formation of at least a part of the target feature. The line segments for the phase shift windows in the pair are defined by dissecting a boundary of the phase shift window at a dissection point at corner of the phase shift window which abuts an edge of the target feature caused by the phase transition. Likewise, the line segments of the trim shape are defined by dissecting the boundary of the trim shape at dissection points at the corner of the trim shape which abuts an edge of the target feature caused by the phase transition.
Another embodiment of the invention provides a method for performing optical proximity correction for a target feature of integrated circuit layout. In this embodiment, the layout is accomplished using a full phase pattern that comprises a first phase shift window and the second phase shift window. The first and second phase shift windows have respective sides comprising at least one line segment abutting the target feature. A phase transition between the first and second phase shift windows cause an artifact to be trimmed. For example, the first and second phase shift windows may abut the sides of intersecting line segments in the target pattern, and create a phase transition at the inside corner of the intersection that would create an artifact to be trimmed. A trim shape comprising at least one line segment abutting the target feature is used to trim the artifact. According to the present invention, at least one line segment of the first phase shift window and at least one line segment of the trim shape that abut the target feature are identified. Proximity correction is performed by adjusting the positions of both the identified at least one line segment of the first phase shift window and the identified at least one line segment of the trim shape. Said adjusting includes for example offsetting the at least one line segment of the phase shift window and the at least one line segment of the trim shape from adjacent line segments defining boundaries of the features, preferably in a direction which is orthogonal to the adjacent line segments that define boundaries of features.
Another embodiment of the invention includes layout a first mask pattern including phase shift windows having boundaries defined by line segments in a first mask layout, and a second mask pattern including trim shapes having boundaries defined by line segments in the second mask pattern. In this embodiment, the combination of the first and second mask patterns is used for defining
Côté Michel Luc
Pierrat Christophe
Dimyan Magid
Haynes Mark A.
Haynes Beffel & Wolfeld LLP
Numerical Technologies Inc.
Smith Matthew
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