Optical-gate transistor and method of manufacturing the same

Details Optical-gate transistor and method of manufacturing the same Optical-gate transistor and method of manufacturing the same

2003-08-07

2004-09-07

Pham, Long (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C438S057000

Reexamination Certificate

active

06787828

ABSTRACT:

This application claims the benefit of Taiwan application Serial No. 91136030, filed Dec. 12, 2002.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to an optical-gate transistor and method of manufacturing the same, and more particularly to an optical-gate transistor, in which a prism-shaped, light-receiving layer is formed between a source electrode and a drain electrode instead of a gate electrode, and method of manufacturing the same.
2. Description of the Related Art
In the twenty-first century, information technology has moved into the terabyte era. Optoelectronic technology plays a very important role in transmitting, processing, storing, and displaying terabyte information. The optoelectronic integrated circuit (OEIC) uses a type of manufacturing technology, which incorporates optical devices and electronic devices on a substrate. OEIC is a technique with high potential in optoelectronic technology because devices made in this manner have smaller volume, lower cost, and higher stability during operation.
FIG. 1
shows a cross-sectional view of an OEIC structure disclosed in U.S. Pat. No. 6,355,945. In this configuration we see that a typical OEIC has a photodiode
12
as an optical circuit region and a metal semiconductor field effect transistor (MESFET)
14
as an electronic circuit region on a gallium-arsenic (GaAs) substrate
11
. The photodiode
12
is composed of an n-type gallium-nitride (GaN) layer
12
a
and a p-type GaN layer
12
b
, and the MESFET
14
includes a source electrode
14
a
, a gate electrode
14
b
, and a drain electrode
14
c
. A conducting wire
16
connects the n-type electrode
18
a
of the photodiode
12
and the gate electrode
14
b
of the MESFET
14
to electrically couple the optical circuit region and the electronic circuit region.
When the incident light
19
is received by the p-type GaN layer
12
b
of the photodiode
12
, a photoelectric current is generated in the photodiode
12
and then converted to an electrical signal, which provides voltage for the gate electrode
14
b
via the conducting wire
16
. Therefore, the OEIC can be effectively used as a photoelectric switch when bias voltage is applied to the source electrode
14
a
and the drain electrode
14
c.
In practical applications, using thermal diffusion or an iron implantation method, an n-type silicone substrate
13
, a p-type source-electrode region
15
, and a p-type drain-electrode region
17
are sequentially formed on a part of the GaAs substrate
11
. Afterwards, a source electrode
14
a
, a gate electrode
14
b
, and a drain electrode
14
c
are formed by a photolithography and etching method to complete the process of manufacturing MESFET
14
. Subsequently, an n-type GaN layer
12
a
and a p-type GaN layer
12
b
are successively formed on another part of the GaAs substrate
11
. An n-type electrode
18
a
and a p-type electrode
18
b
are further formed by a photolithography and etching method to complete the process of fabricating the photodiode
12
. Due to the large lattice mismatch between the GaN layer
12
a
and the GaAs substrate
11
, lattice defects are easily generated as the GaN layer
12
a
is deposited. For this reason, a zinc-oxide (ZnO) buffer layer
10
is deposited on the GaAs substrate before the GaN layer
12
a
. Since the lattice mismatch between the ZnO material and the GaAs substrate
11
is relatively low, a better GaN layer
12
a
can be formed on the GaAs substrate
11
.
However, as shown in
FIG. 1
, the typical OEIC uses a photodiode
12
for receiving the incident light
19
, which is then converted to an electric signal for controlling the gate electrode
14
b
of MESFET
14
. This procedure of manufacturing a photodiode for receiving the incident light in order to control the MESFET
14
is unnecessary though, since the incident light can be received directly by the OEIC-designed MESFET. This prevents waste of accessible space in the integrated circuit and reduces fabrication costs.
Moreover, the photoelectric current generated by the incident light
19
and received by the photodiode
12
will be unstable, thereby providing unstable voltage for the gate electrode of the MESFET
14
. In addition, the gate electrode voltage caused by the photoelectric current has to be higher than a threshold voltage to generate a drain current. As a result, the sensitivity of the OEIC device being controlled by the illumination will be reduced.
Furthermore, as shown in
FIG. 1
, the conductivity of the MESFET
14
is increased by the doped silicone substrate
13
under the gate electrode
14
b
, but the impurities doped in substrate
13
will also block electrons from moving between the source and the drain electrodes, thereby lowering the electron mobility in the transistor. As OEIC applications tend to develop devices of high gain, high power, and high frequency, the issue mentioned above causes considerable restrictions. A high electron mobility transistor (HEMT) was invented to solve the issue of hetero-junction between two GaN-group materials with different band gaps. A narrow potential well is generated at the interface of the two GaN-group materials within the band-gap offset, where the electrons can move at a high speed without obstacles, thereby forming a two-dimensional electron gas (2DEG). This can be applied to devices using higher frequency and higher power. However, the drain current of the HEMT transistor is still controlled by the gate electrode, and the 2DEG effect has not yet been applied to the design of OEIC devices.
SUMMARY OF THE INVENTION
It is therefore an objective of the invention to provide an optical-gate transistor by designing a prism-shaped, light-receiving layer between the source and drain electrodes so that the incident light can be directly received by the transistor and then focused to induce a 2DEG at the hetero-junction interface between two GaN-group materials, thereby increasing the sensitivity of the transistor being controlled by illumination and improving the power and performance of the optical-gate transistor.
The invention achieves the above-identified objectives by providing a method of manufacturing an optical-gate transistor as described below.
A silicone substrate is formed first, and a boron-phosphide (BP) buffer layer is then formed by a halide vapor phase epitaxy. Afterwards, a first aluminum-nitride (AIN) layer, a GaN layer, and an n-type AIN layer are successively formed on the buffer layer by metal organic chemical vapor deposition. A second AIN layer is continuously formed by metal organic chemical vapor deposition. A source-electrode region and a drain-electrode region are then formed by a photolithography and etching method. Subsequently, the second AIN layer is etched to form a prism-shaped, light-receiving layer. Source and drain electrodes are formed last. The incident light is focused by the prism-shaped, light-receiving layer, which further induces a photoelectric current in the n-type AIN layer. The induced electrons fall into the adjacent GaN layer to form a high-speed 2DEG. In this way, the power and performance of the optical-gate transistor can be enhanced.
The invention achieves the above-identified objectives by providing an optical-gate transistor structure. The transistor includes a silicone substrate, a BP buffer layer formed on the substrate, a first AIN layer formed on the buffer layer, a GaN layer formed on the first AIN layer, a source electrode, an n-type AIN layer, and a drain electrode, which are formed on the GaN layer, and a prism-shaped, light-receiving layer formed on the n-type AIN layer. The n-type AIN layer is positioned between the source and drain electrodes. The prism-shaped, light-receiving layer can focus the incident light, and thus improve the sensitivity of the transistor being controlled by illumination.
Other objectives, features, and advantages of the invention will become apparent from the following detailed description of the preferred but non-limiting embodiments. The following description is made with referen

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