Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
1998-10-21
2001-08-14
Baker, Stephen M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
C369S059160, C714S709000
Reexamination Certificate
active
06275967
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to read channels and more particularly to a Digital Video Disk (DVD) read channel.
BACKGROUND OF THE INVENTION
Currently, DVD read channels use a bit-by-bit detection scheme because of its simplicity. The performance of the bit-by-bit detection scheme is acceptable for the DVD-Video channel which operates at the clock frequency of 26.14 MHz (1X). Recently, higher clock frequencies are required for DVD-ROM applications, for example, 6X=157 MHz, 10X=261 MHz). The simple bit-by-bit detection is not sufficient to achieve the reliable performance for such high speed channels. Even in the low frequency applications, the high performance and low cost detector is desirable because it enables the cost reduction of other components.
The Partial Response Maximum-Likelihood, PRML, algorithm has been widely used in magnetic recording fields for improving performance, but the PRML algorithm is not acceptable for the DVD read channel because the spectrum of the wave forms from the DVD disk is difficult to equalize to partial response target spectrum.
Recently, the use of a Viterbi detector without partial response equalization has been examined, (by Hideki Hayashi et al, PIONEER R & D p. 37-43, Vol. 6 No. 2 1996 in Japanese). They reported that the error rate was reduced to be more than 2 order of magnitude. They used a 6-state trellis scheme, and 32 bits survival path memories. The detector is composed of 3000 gates, and one A to D converter.
The use of a Maximum Likelihood detector (ML detector) such as a Viterbi detector can improve the performance, but the circuit is much more complicated than that of the bit-by-bit detector, and the maximum operation speed is limited by the Add-Compare-Select, ACS, operation of the Viterbi detector.
SUMMARY OF THE INVENTION
The present invention provides improved performance and a low cost detection apparatus and method. The detection of the present invention is capable of higher operation speed than a Viterbi detector.
REFERENCES:
patent: 5457418 (1995-10-01), Chang
patent: 5537374 (1996-07-01), Wachi
patent: 5757857 (1998-05-01), Buchwald
patent: 5768320 (1998-06-01), Kovacs et al.
patent: 5774286 (1998-06-01), Shimoda
patent: 5832039 (1998-11-01), Rijns
patent: 5844741 (1998-12-01), Yamakawa et al.
patent: 5917859 (1999-06-01), Yamasaki et al.
patent: 5937020 (1999-08-01), Hase et al.
patent: 5946329 (1999-08-01), Hirose et al.
patent: 5963518 (1999-10-01), Kobayashi et al.
patent: 5986990 (1999-11-01), Moon
Baker Stephen M.
Brady W. James
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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