Opposite direction multiple-phase clocking in adjacent CCD shift

Details Opposite direction multiple-phase clocking in adjacent CCD shift Opposite direction multiple-phase clocking in adjacent CCD shift

1985-12-30

1987-08-18

Munson, Gene M.

Electrical pulse counters, pulse dividers, or shift registers: c

Counting or dividing in incremental steps

Beam type tube

357 59, 377 62, H01L 2978, H01L 2904, G11C 1928

Patent

active

046880666

ABSTRACT:
Parallelled charge transfer channels have multiple-phase-clocked gate electrodes overspanning them in one of a number of arrangements conditioning the transfer of charge packets in opposing directions in adjacent charge transfer channels. Three-phase, four-phase, five-phase and six-phase clocking arrangements constructed in three layers of polysilicon embody the invention.

REFERENCES:
patent: 3760202 (1973-09-01), Kosonocky
patent: 3921194 (1975-11-01), Engeler et al.
patent: 3921195 (1975-11-01), Smith et al.
patent: 3961352 (1976-06-01), Colton et al.
patent: 4262297 (1981-04-01), Partridge
Sequin et al., "Charge-Coupled Area Image Sensor Using Three Levels of Polysilicon", IEEE Trans. on Elec. Devices, vol. ED-21, No. 11, 11/74, pp. 712-720.
Sequin et al., Charge Transfer Devices, Academic Press, NY, 1975, p. 38.
Bertram et al., "A Three-Level Metallization Three-Phase CCD", IEEE Trans. on Elec. Devices, vol. ED-21, No. 12,12/74, pp. 758-767.

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