Computer graphics processing and selective visual display system – Computer graphics display memory system – Shared memory
Reexamination Certificate
2005-01-11
2005-01-11
Bella, Matthew C. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Shared memory
C711S122000, C711S119000
Reexamination Certificate
active
06842180
ABSTRACT:
An electronic device that has an integrated central processing unit (CPU) including a pre-fetch stride analyzer and an out-of-order engine is provided. The electronic device also has a graphics engine, having graphics memory, that is coupled to the integrated CPU. A main memory that is coupled to a memory controller is provided. The memory controller is also coupled to the CPU and the graphics engine. The device has a host address decoder coupled to the integrated CPU. A front side bus (FSB) is provided that is coupled to the integrated CPU and the host address decoder. Also provided is a plurality of memory components. Accordingly, either the plurality of memory components or the graphics memory can be shared to perform alternate memory functions. Additionally, a method is provided that determines allocation availability between memory components in an integrated computer processing unit. The method also shares an available memory component as a pre-fetch buffer and another available memory component as a victim cache.
REFERENCES:
patent: 5860095 (1999-01-01), Iacobovici et al.
patent: 6215497 (2001-04-01), Leung
patent: 6295594 (2001-09-01), Meier
patent: 6397296 (2002-05-01), Werner
patent: 6483516 (2002-11-01), Tischler
Garg Vivek
Keshava Jagannath
Maiyuran Subramaniam
Palanca Salvador
Bella Matthew C.
Singh Dalip K.
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