Patent
1997-03-04
1998-08-25
Lim, Krisna
395390, G06F 934, G06F 938
Patent
active
057991634
ABSTRACT:
Instruction issue rate is enhanced by passing multiple instructions to a read stage when the number of required source operands exceeds the read capability of a register file but operand forwarding reduces the number of reads required. The multiple instructions can be issued for execution with source operands read from the register file and source operands forwarded from execution units without using maximum number of register file read ports in a superscalar vector processor architecture. Even when there is both inter-instruction data dependency and there are more source operands for, say, two instructions, to be fetched than available register file read ports, if some of the source operands can be obtained via result forwarding and the rest of the operands can be obtained via available register file read ports, the two instructions can be issued simultaneously. In an alternative embodiment, operand masking is implemented, which complicates the original scheme, as source operand mask and the mask of the result to be forwarded has to match.
REFERENCES:
patent: 4320454 (1982-03-01), Suzuki
patent: 4924377 (1990-05-01), Kuriyama et al.
patent: 5123108 (1992-06-01), Olson et al.
patent: 5274776 (1993-12-01), Senta
patent: 5619668 (1997-04-01), Zaidi
patent: 5638526 (1997-06-01), Nakada
Park Heonchul
Song Seungyoon P.
Lim Krisna
MacPherson Alan H.
Millers David T.
Samsung Electronics Co,. Ltd.
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