Opportunistic CPU functional testing with hardware compare

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Details

C714S025000, C714S033000, C714S037000

Reexamination Certificate

active

10659079

ABSTRACT:
One embodiment disclosed relates to a method of providing CPU functional testing. Operations are executed on multiple functional units of a same type in the CPU. The outputs of the multiple functional units are automatically compared. The results of the comparison are checked only for redundant operations. Another embodiment disclosed relates to a microprocessor with built-in functional testing capability. The microprocessor includes multiple functional units of a same type and registers that receive outputs from the multiple functional units. In addition, comparator circuitry is built-in that also receives the outputs from the multiple functional units and compares the outputs to provide functional testing.

REFERENCES:
patent: 4916696 (1990-04-01), Funakubo
patent: 5195101 (1993-03-01), Guenthner et al.
patent: 5202975 (1993-04-01), Rasbold et al.
patent: 5396618 (1995-03-01), Fukui et al.
patent: 5530804 (1996-06-01), Edgington et al.
patent: 5640508 (1997-06-01), Fujiwara et al.
patent: 5732209 (1998-03-01), Vigil et al.
patent: 5819088 (1998-10-01), Reinders
patent: 5835776 (1998-11-01), Tirumalai et al.
patent: 5838692 (1998-11-01), Tobin
patent: 5838897 (1998-11-01), Bluhm et al.
patent: 6134675 (2000-10-01), Raina
patent: 6289300 (2001-09-01), Brannick et al.
patent: 6385755 (2002-05-01), Shimomura et al.
patent: 6408377 (2002-06-01), Munson
patent: 6434712 (2002-08-01), Urban et al.
patent: 6553530 (2003-04-01), Kim
patent: 6625688 (2003-09-01), Fruehling et al.
patent: 6640313 (2003-10-01), Quach
patent: 2002/0038418 (2002-03-01), Shimamura
patent: 2004/0039967 (2004-02-01), Park
patent: 2005/0055608 (2005-03-01), Shidla et al.
patent: 2005/0055674 (2005-03-01), Shidla et al.
patent: 2005/0055683 (2005-03-01), Shidla et al.
patent: 0 260 584 (1988-03-01), None
patent: 1 409 466 (1975-10-01), None
T.H. Chen, et al. “Concurrent error detection in array multipliers by BIDO” Nov. 1995, pp. 425-430, vol. 142, No. 6, IEE Proc.-Comput. Digit. Tech.
W. Hahn, et al., “Psuedoduplication of Floating-Point Addition—A Method of Compiler Generated Checking of Permanent Hardware Faults” 1991, pp. 161-165, IEEE VLSI Test Sympo.
Patents Act 1977: Search Report under Section 17 for Application No. GB 0 418 639.1.

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