Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2005-06-07
2005-06-07
Dinh, Son T. (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C365S189050, C365S189070, C365S194000
Reexamination Certificate
active
06903997
ABSTRACT:
The invention provides an operation verification system that can verify a stable operation at the device mounting, and an adaptive control system that can speed up the arithmetic up to its internal stable operation limit and reduce loads on a control circuit within an internal stable operation range. An operation verification system includes a normal operation circuit104that is constituted by a clock generation unit101for generating an operation clock, a first memory element102as an operation verification target, and an arithmetic circuit group103; and an operation verification circuit107that is constituted by a second memory element150that stores the same data as stored in the first memory element102, with a clock having a different phase, and a judgement unit106for judging whether the circuit104is stably operating or not, on the basis of outputs from the first and second memory elements102and105, and monitors an output from the judgement unit106, to perform verification of high-speed operation of the first memory element102at a low operation frequency.
REFERENCES:
patent: 4419737 (1983-12-01), Yamaura et al.
patent: 5748782 (1998-05-01), Ferreira et al.
patent: 5969996 (1999-10-01), Muranaka et al.
patent: 05264667 (1993-10-01), None
Dinh Son T.
Matsushita Electric - Industrial Co., Ltd.
Parkhurst & Wendel L.L.P.
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